Introduction: Scaling the Digital Highway

The foundational STM-1 (or OC-3) signal, with its bit rate of $155,52 \text{ Mbps}$, provided a massive capacity boost over older PDH systems. However, the true power of SDH/SONET lies in its elegant and simple scalability. Network traffic is constantly growing, and a transport technology must be able to grow with it. The SDH/SONET hierarchy was designed to scale capacity in predictable, standardized steps, creating a digital highway with an ever-increasing number of lanes.

This is achieved by multiplexing multiple lower-level STM signals into a single, higher-level STM signal. This process is perfectly synchronous and relies on a clean, simple technique called byte-interleaving. By combining multiple "trains" into one much larger, faster train, the network can efficiently transport huge volumes of data.

The SDH/SONET Rate Hierarchy

The hierarchy is built on a simple rule: each successive level is exactly four times the capacity of the level below it. This creates a predictable and consistent set of data rates that are recognized globally.

Note: While levels like STM-512 (80 Gbps) and STM-768 (120 Gbps) are theoretically defined, they were rarely deployed in practice, as the industry shifted towards increasing capacity via DWDM technology instead of higher single-wavelength TDM rates.

The Mechanics of Multiplexing: Creating an STM-N Frame

The process of creating a higher-level frame, like an STM-4 from four STM-1s, is a perfect illustration of synchronous, byte-interleaved multiplexing. It does not involve pointers or complex justification because all incoming STM-1 signals are assumed to be synchronized to the same master network clock.

Creating an STM-4 from Four STM-1s

1. Frame Alignment: The multiplexer first aligns the incoming four STM-1 frames in time. Since they are all synchronous, their frame boundaries line up perfectly.
2. Byte Interleaving: The multiplexer constructs the new, larger STM-4 frame byte by byte. It takes the first byte from the first STM-1, then the first byte from the second STM-1, then from the third, then fourth. It repeats this process for the second byte of each STM-1, and so on, "weaving" them together.
3. Resulting STM-4 Frame Structure:
   • Dimensions: The STM-4 frame still has 9 rows, but its width is four times that of an STM-1. It has $4 \times 270 = 1080$ columns.
   • Duration: Crucially, the duration of an STM-4 frame is still exactly $125 \text{ µs}$. To transmit four times as many bytes in the same amount of time, the bit rate must be four times higher.
   • Bit Rate: $4 \times 155,52 \text{ Mbps} = 622,08 \text{ Mbps}$.
4. Overhead Management: The overhead of the new STM-4 frame is created by combining and regenerating the overhead from the four incoming STM-1s.
   • Some overhead bytes, like the Framing Bytes (A1, A2) and the management channels (DCC), are simply interleaved. The STM-4 SOH will have four times as many of these bytes.
   • Other bytes, like the error-checking B1 and B2, are recalculated for the new, larger STM-4 frame.
   • The pointers (H1, H2, H3) from the original STM-1s are passed through transparently, as they are part of the payload (the AUGs) that is being interleaved.

STM-16, STM-64 and Beyond

The exact same principle applies to create even higher levels of the hierarchy.

Creating an STM-16 (2.5 Gbps)

• Composition: An STM-16 is formed by byte-interleaving four STM-4 signals.
• Frame Structure: 9 rows by $4 \times 1080 = 4320$ columns.
• Bit Rate: $4 \times 622.08 \text{ Mbps} = 2488.32 \text{ Mbps} \approx 2.5 \text{ Gbps}$.
• Note on Interleaving: At higher levels like STM-16, the interleaving process might be done on a multi-byte basis (e.g., interleaving 4-byte blocks instead of single bytes) to simplify the hardware design of the high-speed multiplexers. The logical principle remains the same.

Creating an STM-64 (10 Gbps)

• Composition: An STM-64 is formed by byte-interleaving four STM-16 signals.
• Bit Rate: $4 \times 2488.32 \text{ Mbps} = 9953.28 \text{ Mbps} \approx 10 \text{ Gbps}$.

The Limit of TDM and the Rise of WDM

While the SDH/SONET hierarchy theoretically continues to STM-256 (40 Gbps) and beyond, scaling to these speeds using pure Time-Division Multiplexing (TDM) becomes increasingly difficult and expensive. The electronics required to process signals at 40 billion cycles per second are extremely complex and power-hungry.

For this reason, the industry largely stopped at STM-64 (10 Gbps) as the highest commonly deployed TDM rate on a single wavelength. To achieve higher capacities, network operators turned to another form of multiplexing: Wavelength Division Multiplexing (WDM). Instead of sending one very fast 10 Gbps signal down a fiber, WDM technology allows operators to send many separate 10 Gbps signals down the same fiber simultaneously, each on a different "color" (wavelength) of light. This approach proved to be a more cost-effective and scalable path to the terabit-per-second capacities of modern networks.