SDH

Higher Order STM Levels

Scaling beyond STM-1: STM-4/16/64/256 rates and aggregate capacities.

Introduction: Scaling STM Rates

The basic STM-1 signal has a line rate of 155.520 Mbit/s155.520 \text{ Mbit/s}. The SDH hierarchy increases this rate in standardized steps by combining STM structures with the same frame format. The numerical relationship is fixed, so equipment can use STM-4, STM-16, STM-64, or STM-256 with the corresponding line interface.

Higher rates are obtained by multiplexing multiple lower-order STM signals into one higher-order STM signal. The process uses . It joins the input frames into one line signal while preserving each constituent's VC hierarchy, pointer relationships, and path overhead for demultiplexing.

The SDH/SONET Rate Hierarchy

Each successive level in the defined hierarchy has exactly four times the line rate of the immediately lower level. The values N are 1, 4, 16, 64, and 256, giving a consistent set of line interfaces.

SDH LevelSONET LevelBit Rate (Mbit/s)Short nameComposition
STM-1OC-3155.52155 MbpsBase Rate
STM-4OC-12622.08622 Mbps4×STM-14 \times \text{STM-1}
STM-16OC-482488.322.5 Gbps4×STM-44 \times \text{STM-4}
STM-64OC-1929953.2810 Gbps4×STM-164 \times \text{STM-16}
STM-256OC-76839813.1240 Gbps4×STM-644 \times \text{STM-64}

The standardized sequence contains STM-1, STM-4, STM-16, STM-64, and STM-256. STM-512 and STM-768 are not part of this sequence.

The Mechanics of Multiplexing: Creating an STM-N Frame

Creating a higher-order frame, such as STM-4 from four STM-1s, uses synchronous byte-interleaved multiplexing. The input signals have the same 125 µs frame period and are aligned at the multiplexer. Pointers do not disappear from the transport: they remain associated with the AU or TU structures carried inside the constituent payloads.

Creating an STM-4 from four STM-1s

  1. Frame alignment: The multiplexer identifies the boundaries of the four STM-1 frames and aligns them to a common timing reference. A common frame period does not mean that every input boundary already has the same phase.
  2. Byte interleaving: The multiplexer constructs the STM-4 frame by taking corresponding bytes from the four STM-1 structures in a defined order. It repeats the cycle for every frame position, so each constituent occupies its specified part of the output structure.
  3. Resulting STM-4 frame structure:
    • Dimensions: The STM-4 frame has 9 rows and 4×270=10804 \times 270 = 1080 columns, four times the STM-1 width.
    • Duration: The STM-4 frame duration remains 125 μs125\,\mu\text{s}. Four times as many bytes are transmitted in the same interval, so the line rate is four times higher.
    • Bit rate: 4×155.520 Mbit/s=622.080 Mbit/s4 \times 155.520 \text{ Mbit/s} = 622.080 \text{ Mbit/s}.
  4. Frame overhead: The STM-4 section overhead is generated and monitored for the new STM-4 signal. It is not a direct copy of four incoming headers.
    • Synchronization and management positions in the STM-N overhead use the layout defined for the STM-4 width. The multiplexer generates them for the new section span.
    • Error-monitoring bytes are calculated for the corresponding STM-4 structure and direction rather than copied unchanged from the inputs.
    • AU pointers, including H1, H2, and H3 fields, remain associated with the payload structures of the constituents. Path Overhead travels with its corresponding VC.

STM-16, STM-64, and STM-256

The same principle applies to the remaining levels because every STM-N is formed by interleaving the required number of structures from the next lower level.

Creating an STM-16 (2.5 Gbps)

  • Composition: An STM-16 is formed by byte-interleaving four STM-4 signals.
  • Frame structure: 9 rows by 4×1080=43204 \times 1080 = 4320 columns.
  • Bit rate: 4×622.080 Mbit/s=2488.320 Mbit/s≈2.5 Gbit/s4 \times 622.080 \text{ Mbit/s} = 2488.320 \text{ Mbit/s} \approx 2.5 \text{ Gbit/s}.
  • Implementation: Hardware may process several bytes in parallel, but the logical interface structure remains the defined interleaving of STM-4 structures.

Creating an STM-64 (10 Gbps)

  • Composition: An STM-64 is formed by byte-interleaving four STM-16 signals.
  • Frame structure: 9 rows by 4×4320=172804 \times 4320 = 17280 columns.
  • Bit rate: 4×2488.320 Mbit/s=9953.280 Mbit/s≈10 Gbit/s4 \times 2488.320 \text{ Mbit/s} = 9953.280 \text{ Mbit/s} \approx 10 \text{ Gbit/s}.

TDM at High Rates and WDM

STM-256 is a defined level with a line rate of 39,813.120 Mbit/s. Processing one TDM signal at this rate requires short electrical paths, wide-band circuits, precise synchronization, and an optical interface with sufficient margin. therefore faces increasing hardware, synchronization, and power constraints. A 40 Gbit/s line rate is the transmission rate of the complete stream, not a claim that the clock runs at 40 billion cycles per second.

WDM increases capacity by placing independent optical channels on different wavelengths in the same fiber. Each channel can carry STM-N or another client format, and the aggregate rate is the sum of the channel rates. WDM does not change the STM structure on one wavelength; it allows several carriers to operate at the same time.

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