Hierarchies

Synchronization in SDH/SONET

The master-slave clock hierarchy (PRC, SSU, SEC), SSM messages, jitter, and wander.

Clock synchronization in digital networks

A telecommunications network connects multiplexers, cross-connects, and regenerators. Aggregating streams increases the total carried bit rate, and each element uses a frequency reference consistent with the other elements. Consistent timing determines when data is sampled, written, and read. Maintaining that consistency across the network is called synchronization.

In earlier , devices had their own “nearly synchronous” clocks, whose differences required alignment mechanisms and increased multiplexing complexity. SDH/SONET was designed as a synchronous system in which network-element clocks follow a hierarchy of reference sources, with traceability to a PRC. Maintaining that hierarchy and handling link failures across a large network remain engineering tasks.

Effects of clock-frequency differences

A receiver uses its local clock to determine when to sample a signal and recognize values 1 and 0. A phase or frequency difference between the transmitter and receiver clocks shifts those instants and can cause regeneration errors.

Buffer Overflow and Underflow

Receiving equipment uses a memory buffer to compensate for small timing differences. Data is written to the buffer according to the sender’s recovered clock and read according to the receiver’s local clock.

  • Overflow: If the sender’s clock is faster than the receiver’s clock, data arrives faster than it is read. The buffer can overflow, and some incoming data will be lost.
  • Underflow: If the sender’s clock is slower than the receiver’s clock, data is read faster than it arrives. The buffer can become empty, and the receiver will either read old data again or register an error.

Slips caused by clock mismatch

When the difference between the write and read rates causes the buffer capacity to be exceeded, a slip occurs. In ITU-T G.810, a slip is the repetition or deletion of a block of bits in a synchronous or plesiochronous stream. The mechanism can delete data during overflow or repeat data during underflow to restore the buffer position. In PDH, slips are associated with frame or octet boundaries. In SDH, pointer processing limits the effect of timing differences in the transport network, while slips can still occur at plesiochronous interfaces. A slip remains data corruption, and its effect depends on the service:

  • Uncompressed voice (telephony): A single slip may be audible as a “click” or “pop”. A short artifact does not necessarily interrupt the call.
  • Fax or modem data: A slip may introduce a burst of errors into part of the transmission, and the protocol may request retransmission of that data block.
  • Compressed video: A damaged byte in an inter-frame-compressed stream may produce blockiness or a frozen image. The distortion may persist for several seconds until the next complete reference frame is decoded.

ITU-T G.822 defines controlled-slip-rate objectives for international 64 kbit/s digital connections, including allowable slip counts over 24-hour periods. ITU-T G.821 addresses error performance, so it is not the correct reference for slip-count objectives. G.822 shows that timing stability depends on the whole connection and on interactions among its devices.

Jitter and wander

A slip can occur when a phase or frequency difference causes the buffer capacity to be exceeded. Separately, ITU-T G.810 describes short-term and long-term changes in the significant instants of a signal, or phase fluctuations, relative to their ideal positions. A 10 Hz boundary separates the two categories:

Jitter

In practice, the relevant components are at or above 10 Hz. They can be caused by electronic noise, non-ideal component behavior, and the data pattern itself, which produces pattern-dependent jitter.

Wander

refers to low-frequency, long-term drift in signal timing (below 10 Hz). Wander is affected by temperature changes in oscillators and by small, cumulative frequency differences between independent primary network clocks, for example at the boundary between two national networks.

The SDH/SONET synchronization hierarchy

To limit slips, jitter, and wander, SDH/SONET uses a master-slave hierarchical synchronization strategy. According to ITU-T G.803, network-element clocks are traceable to a G.811-compliant PRC, while lower levels use a reference from the same or a higher level. Within a station, timing may be distributed from the highest-level clock in a logical star, while inter-station synchronization follows a tree-like hierarchy. A node may have several reference inputs and change its active reference after a failure. This topology limits timing conflicts and synchronization loops.

Tier 1: The Primary Reference Clock (PRC)

At the top of the hierarchy is the PRC, the primary reference clock for a national or regional network.

  • Function: The PRC provides a stable and accurate timing reference. In clock quality terminology, it corresponds to Stratum 1\mathrm{Stratum}\ 1. G.811 requires long-term frequency accuracy of at least 1×10−111 \times 10^{-11} and verification against UTC.
  • Technology: A PRC can be autonomous or disciplined by a precise radio or satellite signal traceable to UTC. Implementations use atomic clocks, including cesium standards, and GNSS receivers, including GPS, whose satellites carry atomic clocks. In the United States, NIST and USNO maintain official national time scales.
  • Requirements: PRC stability requires controlled operating conditions, particularly limiting the effects of temperature, humidity, and vibration on the clock.

Tier 2: The Synchronization Supply Unit (SSU) / Building Integrated Timing Supply (BITS)

An SSU, or a BITS clock in North American terminology, is a high-quality slave clock installed in a major network node such as a central office.

  • Function: An SSU usually receives several timing references from a PRC or another SSU. It selects the active input, attenuates jitter and wander, and distributes the recovered timing within the node.
  • Holdover mode: If the SSU loses all external references, it enters holdover. Its internal oscillator maintains operation within the limits specified for that SSU type for the required holdover interval. The node retains synchronization until a reference is restored or that interval expires.

Tier 3: The Synchronous Equipment Clock (SEC)

The SEC is the synchronous clock in an SDH/SONET element, such as an Add-Drop Multiplexer or a Cross-Connect.

  • Function: The SEC derives its timing from an incoming STM/OC link or a dedicated SSU/BITS output. The recovered clock controls internal operations and outgoing transmissions. The SEC remains subordinate to the selected reference.

Synchronization Status Message (SSM)

The Synchronization Status Message (SSM) carries information about the quality of a timing source. A network element can use this information to compare available sources and select one that meets its quality criteria.

In an SDH frame, the four-bit SSM code occupies bits 5-8 of the S1 byte in the Multiplex Section Overhead (MSOH), with bit 5 as the most significant bit. The following table lists the quality-level codes for Option I defined in ITU-T G.781.

SSM Value (Binary)Clock Quality LevelMeaning
0010QL-PRCTraceable to a primary reference clock
0100QL-SSU-ATraceable to an SSU-A clock
1000QL-SSU-BTraceable to an SSU-B clock
1011QL-SECDerived from an SDH equipment clock
1111QL-DNUDo not use the signal as a synchronization source

A network element monitors SSM codes on its inputs and considers them when selecting a reference. If the active source is lost, it may select another source with an acceptable quality level. QL-DNU means that the signal must not be used for synchronization, because reusing it could create a timing loop.