Plesiochronous Digital Hierarchy (PDH)

The classic, 'nearly synchronous' hierarchy for multiplexing voice channels (T1/E1).

The Dawn of Digital Transmission

Before the advent of modern technologies like fiber optics, the world's communication networks needed a way to transmit multiple phone calls digitally over a single pair of copper wires. The first global standard to achieve this was the Plesiochronous Digital Hierarchy (PDH). It was a revolutionary system that laid the groundwork for the digital transformation of telecommunication networks in the 1970s and 80s.

To understand PDH, one must first grasp the two fundamental concepts upon which it is built: the digitization of voice through and the technique of combining multiple digital streams through .

Foundation 1: Digitizing Voice with PCM

Human speech is an analog signal. To transmit it digitally, it must be converted into a stream of bits using Pulse Code Modulation (PCM). This involves three key steps:

  1. Sampling: The analog voice signal is measured at regular intervals. For telephony, this is done 8,000 times per second (8 kHz), based on the Nyquist-Shannon theorem.
  2. Quantization: Each sample's continuous amplitude value is rounded to the nearest of 256 predefined discrete levels.
  3. Coding: Each of the 256 levels is assigned a unique 8-bit binary code.

The Basic Digital Voice Channel

This process results in a fundamental building block of digital telephony: the 64 kbit/s channel.
Calculation: 8,000 samples/sec×8 bits/sample=64,000 bits/sec=64 kbit/s8,000 \text{ samples/sec} \times 8 \text{ bits/sample} = 64,000 \text{ bits/sec} = 64 \text{ kbit/s}

Foundation 2: Combining Channels with TDM

With a standard 64 kbit/s digital voice channel, the next challenge is to transmit many such channels over a single high-capacity link. PDH achieves this using Time-Division Multiplexing (TDM).

In TDM, a multiplexer takes one sample (an 8-bit byte) from each incoming voice channel in a round-robin fashion and combines them into a single, repeating structure called a frame. A demultiplexer at the other end performs the reverse operation.

Inside a 2 Mbit/s PCM frame

Explore how four tributaries share time slots in a PDH primary rate (E1) frame and why the structure repeats every 125 µs.

Time slot
TS0TS1TS2TS3TS4TS5TS6TS7TS8TS9TS10TS11TS12TS13TS14TS15TS16TS17TS18TS19TS20TS21TS22TS23TS24TS25TS26TS27TS28TS29TS30TS31125 µs frame

Alternate pattern 0011011… used to keep regenerators aligned. Occupies time slot 0.

Time slot 000110110
Time slot 000110110
Time slot 000110110
Time slot 000110110
Tributary overview
Time slot 0
0

Frame alignment (TS0)

Alternate pattern 0011011… used to keep regenerators aligned. Occupies time slot 0.

64

Voice channel

A sampled 64 kbit/s speech channel. Most of the frame capacity is used for payload slots like this.

64

Data channel

Circuit switched data at 64 kbit/s. Here we show a pseudo-random pattern typical for testing.

16

Signalling (TS16)

CAS signalling bits collected every multiframe. Highlighted when time slot 16 is selected.

Frame anatomy

  • 32 slots × 8 bits = 256 bits per frame
  • Frame duration is locked to 125 µs
  • Slots 0 and 16 carry synchronisation & signalling

This process creates higher-rate digital streams. For example, in North America, 24 voice channels were multiplexed to create a T1 stream, while in Europe, 30 voice channels were multiplexed to create an E1 stream. These form the first level of the Plesiochronous Digital Hierarchy.

The "Plesiochronous" Problem: The Heart of PDH

The name PDH comes from the Greek word plesio, meaning "near" or "close." A plesiochronous network is one where different parts of the system are nearly, but not perfectly, synchronous.

Each multiplexer and digital exchange in a PDH network has its own highly accurate clock, but there are always minute variations between them. When you try to combine several of these slightly different-speed streams (called tributaries) into one higher-speed stream, a problem arises: the bits from the tributaries do not arrive in a perfectly regular pattern.

The Solution: Justification (Bit Stuffing)

PDH solves this timing mismatch with a clever technique called or bit stuffing. The multiplexer for the higher-rate stream runs slightly faster than the sum of the nominal rates of its tributaries. This extra capacity is used to add "stuffing" bits into the tributary data streams as needed to equalize their rates before interleaving. Special justification control bits are also added to tell the receiving demultiplexer whether a stuffing bit is present and should be discarded.

Pointer justification scenarios

Compare how PDH aligns tributaries with the higher-order frame when clocks drift apart.

Scenario

The tributary is slower. Additional stuff bits are inserted so the higher-order container waits for the new payload byte.

  • Pointer value increments when stuff bits are transmitted.
  • Stuff bit is flagged to distinguish it from payload.
  • Keeps synchronisation without dropping information.
Frame counterAdjustment
F1
F2
F3
F4
+ bit
F5
F6
F7
F8
Pointer status
Tributary pointer
Tributary payload
110110110011001111011100
Pointer bytes
001111101001
Higher order frame
1011001011100011
1
2
+J
4
5
6
7
8
9
10
11
12

Extra bits inserted to slow down the container.

While this technique successfully allows for the multiplexing of non-synchronized streams, it is also the main source of complexity and limitations in PDH systems, which will be discussed in subsequent sections.

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