Integrating A/D Converters

Indirect Conversion

Unlike a direct converter such as the Flash ADC, an integrating ADC uses an indirect method and does not determine the code by comparing the input with an entire set of thresholds at once. It first integrates the input voltage or a reference voltage and then converts the integration result into a time interval. A digital counter measures this interval, and its count forms the digital representation of the voltage.

Integration limits conversion speed, but it can improve accuracy and attenuate part of the noise. Integrating converters are used in precision measuring instruments. The basic architectures include single-slope and dual-slope converters.

The Single-Slope ADC

The single-slope ADC is the simplest implementation of integrating conversion.

Operating principle

The conversion process unfolds as follows:

1. At the start of a conversion, a control logic resets a digital counter and triggers an integrator to start generating a linear ramp, or sawtooth waveform, from a constant reference voltage.
2. The counter begins counting pulses from a stable clock source at the exact same moment.
3. A comparator continuously compares the rising ramp voltage from the integrator with the unknown input voltage $U_{IN}$.
4. When the ramp voltage becomes equal to $U_{IN}$, the comparator changes its output state. This change instantly stops the digital counter.
5. The final digital number held by the counter is the output of the ADC. In the ideal model, the ramp rises linearly, so the time needed to reach $U_{IN}$ and the final count are directly proportional to the input voltage.

The Dual-Slope ADC

The dual-slope, or double-integration, ADC performs a measurement in two phases. It integrates the input voltage for a fixed time and then integrates a reference voltage of opposite polarity. In the ideal model, this removes the effect of the integrator's R and C values from the result.

Principle of Operation: a Two-Phase Process

The conversion happens in two distinct phases:

1. Phase 1 (input integration): The unknown input voltage $U_{I}$ is connected to the integrator for a fixed period of time, $T_1$. This fixed time is precisely controlled by allowing a counter to run for its full cycle (e.g., $N_{max}$ clock pulses). During this phase, the integrator's output ramps up to a peak voltage that is directly proportional to the average value of $U_{I}$ over that time.
2. Phase 2 (reference de-integration): At the end of $T_1$, the integrator's input is switched to a stable, known negative reference voltage, $-U_R$. The integrator's output, which was at a positive peak, now begins to ramp down with a constant slope. The counter is reset and starts counting again. It continues to count until the integrator's output reaches zero, which is detected by the comparator. The number of clock pulses, $N$, counted during this second phase ($T_2$) is the final digital result.

For a positive input, the ramp-up slope depends on $U_I$, while the ramp-down slope depends on the constant $-U_R$, so a higher input voltage produces a longer ramp-down time. The exact values of R and C affect both slopes in the same way, and their common factor cancels in the final calculation. This ratiometric measurement depends primarily on the stability of the reference voltage $U_R$, while the clock, comparator, and other circuit errors also affect a practical converter. The resulting relationship is: $N = N_{max} \cdot \frac{U_I}{U_R}$.